A time synchronizing method with excluding influence of transmission delay in each transmission channel or processing delay in each node is described in, for example, IEEE 1588, etc.
In the implementation of a high precision time synchronization system based on the IEEE 1588, the influence of internal processing delay of the sending node and the receiving node is excluded by obtaining time stamps of sending/receiving a packet at a closer timing of physically sending or receiving signals.
The method according to the IEEE 1588 implements time synchronization in all types of network configuration using a master/slave configuration in a point-to-point or multi-point connection as a minimum unit and by combining these minimum units.
Further, in the conventional time synchronizing method, a master clock node (a master, hereinafter) which is a time reference within the network notifies time information, and other slave clock nodes (slaves, hereinafter) obtain a time correction value from a difference between the notified time information and the clock of the own node and carries out the time correction of the own node.
At this time, a method to carry out time correction has been disclosed with considering a delay time of packet transmission calculated from the known network configuration and a cable length between the nodes (Patent Document 1, for example).
Patent Document 1: JP06-52076